Book Description
This book emphasises competitiveness and "staying in business." Consider two companies building identical functional products. One company uses totally through hole with designs requiring eight circuit boards. The second company uses maximum SMT and their design requires two circuit boards. The question is who will be in business two years from now? It should be obvious that the company that manufactures two boards versus eight can totally cost-kill the other company in the manufacturing line. However, in order to control and achieve excellent SMT designs one must be aware that the manufacturing and testing disciplines are more stringent than through hole.

Large issues today. One of the large issues today is how to achieve minimum defects on the line. The purpose of this book is to address those issues along with how to test your product in order to know that it is functional, how to meet the customer's objectives, specification requirements, and how to provide "goodwill."

This text discusses the impact of good test with surface mount designs. What happens with surface mount designs is the company often will not provide a low ppm product because they cannot test it properly. Without proper test they cannot distinguish where the processes are out of spec, and therefore, do not have a figure of merit for variance control and SPC capability. Mr. Hanson defines the complexity of the circuit boards they are being asked to build. He also describes the type of testers and strategy used in order to test the ever increasing complexity. Incorporating the above requires a high degree of discipline. This means the company must integrate the engineering schematic capture, board layout, and the automation machines and testers that are on the factory floor. Current trend is to provide a higher percentage of ASICS. In addition, ball grid arrays are coming into vogue, and the type of hardware that is being placed on the boards is increasingly finer pitched. There are more pinouts, more PCB layers, and the products are exponentially more involved to build with low ppm.

The decreasing visibility ratio, i.e. more electrical nodes on the board but yet no more I/O pins on the connector dictates that other test methodologies must be used in lieu of board function test. A number of companies for whom the author has consulted, have totally eliminated board functional test with surface mount designs because of no payback test. Hence, the author is required to discuss methods used at schematic capture and routing so that the board will be perfect for bareboard and in-circuit testing. I this status is attained, then the cost of test of surface mount can be rapidly reduced by emphasising functional testing at end item maximising built-in test techniques. The book lays out a detailed discussion of the items required in order to bypass board functional test. The author believes that this strategy is very critical because he has seen companies eliminate as much as ninety percent of their board test cost by doing it right, testing easier, testing earlier, testing for less cost.

Perfect bareboard and in-circuit test guidelines. One of the main purposes of this text is to give a set of rules for achieving perfect bareboard and in-circuit test. It all starts with schematic capture, routing, test ant total company awareness of SMT manufacturing capability.

The uses and limitations of this text. The text cannot offer a detailed explanation of each and every testing concern with surface mount. It cannot abrogate the analysis of a trained consultant of professional who can address your company's specific needs and concerns. This book does provide the proper details for concurrent engineering teams who can use it as a guide to provide the needed requirements of disciplines in any area of surface mount testing in order to achieve good testability for their unique designs. The author's advice is to use this book as a guide for all of your new SMT designs. The details that you will expand on for the various things discussed in this book will be unique to you. If, however, you follow the major disciplines as outlined, the author believes that you shall have a well-thought out strategy, minimum work in process, just-in-time, maximum-return on investment, and minimum cost in the factory. You will be able to have tools of knowledge to fix your defects or know that your product is truly functional when you sell it.

This text offers insight and practical adaptation translating into return-on-investment for your company. Intelligent use of all the principles herein, as applicable to your company will result in an effective SMT test strategy. The effect should be the bottom line, a good return on investment.

Who Will Benefit
This book will be of immense value to both circuit designers as well as CAD designers, and those involved in product testing, troubleshooting and debug of products.

Table of Contents

Chapter 1- CONCURRENT ENGINEERING

• Why communication is essential
• Why support is critical
• Concurrent Engineering
• Testing Objectives
• Vital cultural philosophy to make testability work in the company
• Who should head a design-build team?
• Logistics
• Efficient use of department resources
• Use experts in the design teams
• Getting product to market
• Design for manufacturing

Chapter 2- TESTABILITY CONSIDERATIONS

• Test levels are significant cost factors
• Other benefits
• Is testability applicable to your system?
• Responding to arguments why design personnel cannot add testability
• A company should care about testability
• Manufacturing is major source of problems
• Ways to minimise the cost to develop and produce a product
• DFT program implementation
• DFT requires total commitment
• Faults must be isolated
• Evaluate feasibility and effectiveness of testing
• Fixing the manufacturing line and rapid prototypes
• Requirements, resources, and procedures
• Requirements
• Competitiveness
• Causes of operational failures
• Anomalies and their causes
• Check list for manufacturing test engineering (MTE) conditions
• Partition the boards

Chapter 3- INTEGRATING CAD AND TESTERS

• Saving the software generation
• Integration of design and the factory
• Bareboard test automation
• Motherboard and cable testing automation
• Full ICT abilities
• Robotic testing
• Functional test automation

Chapter 4- TESTABILITY GUIDELINES

• Guide scenario
• LRU guides
• Board level guide
• Placement of test points
• Circuit VLSI/LSI guides
• Mechanical guides
• Analogue guides

Chapter 5- TEST METHODS

• Types of testing and advantages and disadvantages
• Component testing methods
• Circuit board test methods
• Kinds of faults at bareboard level
• Testing bareboard using bed of nails (BON)
• Non-contact or single-contact bareboard testing
• Flying Probe
• Flying Probe
• Flying Probe C measurement method
• Testing bareboard with ATE and BONs
• Bareboard test types
• Leakage
• Dendrite
• Additional topics not listed here

Chapter 6- TESTING SURFACE MOUNT TECHNOLOGY

• Testing SMT - problems and solutions
• The trend to SMT and testing issues
• Circuitry
• Fixturing concerns
• Doing it right at CAE and CAD
• Staggering for simplicity
• Standard cells
• Pads and accuracy's
• Cad requirements for better BONs test
• Safety in-clock interruption
• Override of UUT with external control
• Isolate, divide and conquer
• Additional topics not listed here

Chapter 7- SCAN

• Definition of SCAN
• SCAN design advantages and disadvantages
• The SCAN concept
• SCAN F-F definition
• Types of SCAN
• Serial SCAN
• Level sensitive SCAN
• SCAN set
• The combinations of boundary and serial SCAN
• Serial SCAN test sequence
• Random multiplexer SCAN
• Random access SCAN
• Additional topics not listed here

Chapter 8- TEST STRATEGY

• Strategy consideration
• What is your company's culture?
• Obtaining data
• High volume strategy
• Low volume strategy
• Commercial/military - they are not created equal
• Economic aspects
• Test strategy scenario
• Field rejects, spares, and ESS
• Rapid prototypes

Author: Robert Hanson
Edition: 1999
Pages: 213 pages 8.5" x 11"

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